The present invention relates to a liquid crystal display device; and, more particularly, the invention relates to a liquid crystal display device in which there is no disturbance in the display caused by an abnormality of the timing of pixel clock signals for generating image data supplied to a driving circuit for driving the liquid crystal, and to a driving method therefore.
In an active matrix type liquid crystal display device, which includes active elements, such as thin film transistors (TFT), for respective pixels, and in which switching driving of these active elements is carried out, liquid crystal driving voltages (gray scale voltages) are applied to pixel electrodes through the active elements; and, hence, there is no cross talk between respective pixels, which makes it possible to generate a multi-gray-scale display without using a particular driving method for preventing cross talk, which typically occurs in a simple matrix type liquid crystal display device.
FIG. 12 is a block diagram showing one example of an active matrix type liquid crystal display device, while FIG. 13 and FIG. 14 are waveform timing diagrams which respectively show lateral-direction timing, that is, horizontal-direction timing, and longitudinal-direction timing, that is, vertical-direction timing, with respect to the display control system shown in FIG. 12.
The liquid crystal display device is provided with an interface circuit board on which an interface circuit is mounted, which interface circuit applies pixel data, pixel clock signals and various types of driving voltages to a liquid crystal display panel TFT-LCD upon receiving control signals, including image data and pixel clock signals (the pixel clock signals being referred to as a pixel clock or simply a clock hereinafter) that are supplied from an external signal source, such as a host computer or the like, and other clock signals for synchronization.
The interface circuit includes a display control device and a power source circuit, and it has a data bus which transfers a first pixel, a data bus which transfers a second pixel, a signal line for outputting clocks D1, D2 for fetching pixel data into drain drivers, a signal line for outputting a frame starting direction signal for driving gate drivers and a signal line for outputting gate clocks (clocks G) to the liquid crystal display panel TFT-LCD. Further, the power source circuit is constituted of a positive voltage generation circuit, a negative voltage generation circuit, a multiplexer which synthesizes a positive voltage and a negative voltage, a counter electrode voltage generation circuit and a gate voltage generation circuit.
The number of display pixels of the liquid crystal display panel TFT-LCD which constitutes the liquid crystal display device is 1024 in the lateral direction×768 in the longitudinal direction. The interface circuit board, which receives display data and various types of control signals from the host computer, transfers the data and the signals for a two pixel unit to the liquid crystal display panel. That is, the interface circuit board synthesizes respective data of red (R), green (G), blue (B) as a set and transfers the data and the symbols for two pixels in every unit time to the liquid crystal display panel TFT-LCD through a data line, which is indicated by a bold arrow in the drawing.
With respect to the clock which becomes a reference with respect to the unit time, one half of the frequency for one pixel is transmitted from the host computer (also referred to as an external signal source hereinafter) to the drain drivers of the liquid crystal display panel TFT-LCD through clock lines indicated by narrow arrows in the drawing. As a specific example, the frequency of the clock becomes 32.5 MHz, which is one half of 65 MHz.
To explain the constitution of the liquid crystal display panel TFT-LCD, assuming a display screen as the reference, the drain drivers (TFT drivers) are arranged in the lateral direction and these drain drivers are connected to drain lines of thin film transistors TFT so as to supply voltages for driving the liquid crystal to the thin film transistors TFT. Further, the gate drivers are connected to gate lines so as to supply voltages to gates of the thin film transistors TFT for a fixed time (1 horizontal operation time, display time for 1 line).
The display control device is constituted of a semiconductor integrated circuit (LSI), which is also referred to as a TCON, and receives the image data and control signals from the host computer and outputs the data and signals for two pixels to the drain drivers and the gate drivers based on these data and signals. Here, the data line for one pixel transmits data of 18 bits (6 bits for each of R, G, B). Accordingly, by adopting a 2-pixel data outputting technique, the total data line transmits data of 36 bits.
The reason why the number of pixel data transferred from the host computer to the display control device of the liquid crystal display device and the number of pixel data transferred from the display control device to the drain drivers of the liquid crystal display panel are respectively two pixels is as follows. That is, when 65 MHz, which is the reference clock for 1 pixel, is adopted, there arises a problem in that the data cannot be transferred between these devices and between the device and drain drivers. Accordingly, a two pixel transfer technique is adopted.
As shown in FIG. 13 and FIG. 14, pulses of one horizontal time period are supplied to the gate drivers based on the horizontal synchronizing signal and the display timing signal, such that the voltage is supplied to the gate lines of the thin film transistors TFT for every one horizontal time. In every frame period, a frame starting direction signal is also generated, based on the vertical synchronizing signal, such that the display is generated from the first line.
The positive voltage generation circuit, the negative voltage generation circuit and the multiplexer of the power source circuit alternate the voltage applied to the liquid crystal every fixed time, such that the same voltage is not applied to the same liquid crystal for a long time. Here, “to alternate” means to change the voltage given to the drain drivers to the positive voltage side and the negative voltage side every fixed time using a counter electrode voltage as a reference. Here, the period of alternation is performed in accordance with every frame period.